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12.1 12.2 12.3 12.4 12.5 12.6 12.7 12.8 Describe what happens in the five-way tree shown in Example 12.1 on page 230 when a new record with key 16 is inserted. Find two other orderings of the seven keys in Example 12.5 on page 235 that will produce the same binary search tree. Describe a method for sorting arrays of objects using a binary search tree. Then determine the complexity of the algorithm. Determine which of the binary trees shown in Figure 12.15 on page 241 is a binary search tree. Write the rotateRight() method for the AVLTree class. Prove that every subtree of a binary search tree is also a binary search tree. Prove that every subtree of an AVL tree is also an AVL tree. Here are the U.S. Postal Service abbreviations of the first 10 states, in the order that they ratified the U.S. Constitution: DE, PA, NJ, GA, CT, MA, MD, SC, NH, VA. Show the AVL tree after the insertion of each of these strings.

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Design an analog low-pass filter with the cutoff frequencies found in step I and a passband and stopband ripple ap and a,, respectively. Apply the bilinear transformation to the filter designed in step 2.

EXAMPLE 9.4.3 Let us design a first-order digital low-pass filter with a 3-dB cutoff frequency of w, = 0.2% by applying the bilinear transformation to the analog Butterworth filter

on page 212:

CHAP. 12]

I H,,(s) = 1 s j R,.

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24

Because the 3-dB cutoff frequency of the Butterworth filter is R,., for a cutoff frequency w, = 0.2% in the digital filter, we must have

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Theorem 15.6 If G is a digraph with m edges, then the sum of all outdegrees equals m and the sum of all indegrees equals m. Each edge contributes 1 to the total of all outdegrees and 1 to the total of all indegrees. So each total must be m. The complete digraph a the digraph that has a (directed) edge from every vertex to every other vertex. EXAMPLE 15.14 The Complete Digraph on Six Vertices

The preceding section considered the design of digital low-pass filters from analog low-pass filters. There are two approaches that may be used to design other types of frequency selective filters, such as high-pass, bandpass, or bandstop filters. The tirst is to design an analog low-pass filter and then apply a frequency transformation to map the analog filter into the desired frequency selective prototype. This analog prototype is then mapped to a digital filter using a suitable s-plane to z-plane mapping. Table 9-5 provides a list of some analog-to-analog transformations.

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public class AVLTree extends BinaryTree { protected AVLTree left, right; protected int balance; protected java.util.Comparator comp; public AVLTree(java.util.Comparator comp){ this.comp = comp; } public AVLTree(Object root, java.util.Comparator comp) { this.root = root; this.comp = comp; } public boolean add(Object object) { AVLTree temp = attach(object); if (temp != this) { left = temp.left; right = temp.right; balance = temp.balance; } return true; }

Table 9-5 The 'kansformation of an Analog Low-pass Filter with a 3-dR Cutoff Frequency L2, to Other F'req"ency selective Filters

The graph shown in Figure 15.14 is the complete digraph on six vertices. It has 15 double-directed edges, so the total number of (one-way) edges is 30, which is n(n 1) = 6(6 1) = 6(5) = 30.

This difference equation defines a sequence of operations that are to be performed in order to implement this system. However, note that this system may also be implemented with the following pair of coupled difference equations:

Note the following facts about adjacency matrices: 1. The matrix is symmetric, that is, a[i][j] == a[j][i] will be true for all i and j 2. The number of true entries is twice the number of edges. 3. Different orderings of the vertex set V will result in different adjacency matrices for the same graph. Adjacency matrices are often expressed with 0s and 1s instead of trues and falses. In that form, the adjacency matrix for Figure 15.1 would be the one shown in Figure 15.10 on page 291.

With this implementation, it is only necessary to provide one memory location to store w(n - I), whereas Eq. (8.1)requires two memory locations, one to store y(n - I) and one to store x(n - 1). This simple example illustrates that there is more than one way to implement a system and that the amount of computation and/or memory required will depend on the implementation. In addition, the implementation may affect the sensitivity of the filter to coefficient quantization. and the amount of round-off noise that appears at the output of the filter. In this chapter, we look at a number of different ways to implement a linear shift-invariant discrete-time system and look at the effect of finite word lengths on these implementations.

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